The .ngc file is a critical component of the Xilinx ISE design flow, representing a hierarchical netlist. It plays a vital role in the process of translating a high-level description of your digital circuit into a physical implementation on a Xilinx FPGA. Understanding the nature and purpose of the .ngc file is essential for anyone working with Xilinx ISE. This article will delve into the details of .ngc files, explaining their creation, contents, and significance in the overall design process.
What is an .ngc File in Xilinx ISE?
An .ngc file, short for "Netlist Generation Code," is a text-based file that contains a description of the interconnection structure of your digital circuit. It is essentially a list of components (logic gates, flip-flops, etc.) and their interconnections, representing the logical behavior of your design. The .ngc file is created by Xilinx ISE during the synthesis stage, where your high-level HDL code (Verilog or VHDL) is converted into a more detailed representation that is closer to the actual hardware implementation.
The Role of .ngc Files in Xilinx ISE
.ngc files play a crucial role in the Xilinx ISE design flow, serving as the bridge between the high-level description of your circuit and its physical realization on the FPGA. Here's how they contribute:
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Synthesis Output: The .ngc file is one of the key outputs of the synthesis stage in Xilinx ISE. Synthesis tools, like XST (Xilinx Synthesis Technology), analyze your HDL code and generate a netlist that accurately reflects the logical behavior of your design. This netlist is stored in the .ngc file.
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Hierarchical Design: .ngc files support hierarchical design, allowing you to break down complex designs into smaller, manageable modules. Each module can have its own .ngc file, simplifying design and facilitating reuse.
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Physical Implementation: The .ngc file is used by the subsequent stages of the Xilinx ISE flow, particularly implementation and place and route. These stages take the information from the .ngc file to map the logic gates and connections to specific physical resources on the FPGA.
Contents of an .ngc File
An .ngc file is essentially a text file that follows a specific format defined by Xilinx. It typically contains the following information:
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Component Declarations: Each component in the circuit is declared with its type (e.g., logic gate, flip-flop), name, and any associated attributes.
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Interconnections: The .ngc file details the connections between different components in the circuit. This information describes the flow of data and signals through the design.
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Timing and Constraints: The .ngc file may also contain timing and constraint information, such as clock periods and input/output delays.
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Hierarchy: If your design is hierarchical, the .ngc file will reflect the relationships between different modules.
Understanding .ngc File Generation
The .ngc file is generated by Xilinx ISE's synthesis tools during the synthesis process. When you run synthesis on your HDL code, Xilinx ISE analyzes the code and translates it into a hardware-compatible format. This involves several steps, including:
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HDL Parsing: The synthesis tool parses your Verilog or VHDL code, understanding the syntax and structure of your design.
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Logic Optimization: The tool performs logic optimization, simplifying the logic of your circuit while maintaining its functionality. This involves applying Boolean algebra rules and other optimization techniques.
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Netlist Generation: The optimized logic is then translated into a netlist, which is represented in the .ngc file. This netlist defines the connections between logic gates and other components in your design.
How to Analyze an .ngc File
While .ngc files are typically viewed and manipulated within the Xilinx ISE environment, you can also inspect them directly using a text editor. However, the contents of an .ngc file are not meant to be directly edited by hand. Instead, they are intended to be processed by the subsequent tools in the Xilinx ISE flow.
If you need to analyze or modify the .ngc file, you should use tools and techniques provided by Xilinx, such as:
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**Xilinx ISE: ** You can view and analyze .ngc files within the Xilinx ISE environment by navigating to the "Implementation" view.
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**Xilinx Vivado: ** In more modern Xilinx designs, Vivado is used, and you can analyze the equivalent netlist file (.dcp) using Vivado's GUI or command line tools.
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Netlist Analysis Tools: There are third-party tools specifically designed for netlist analysis that can help you understand the structure and behavior of your design.
Importance of Understanding .ngc Files
Understanding the purpose and contents of .ngc files is essential for anyone working with Xilinx ISE. By understanding how these files are generated and what they represent, you can:
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Troubleshoot Synthesis Errors: If you encounter synthesis errors, analyzing the .ngc file can help you pinpoint the source of the problem.
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Optimize Your Design: By understanding how the netlist is generated, you can make design choices that improve the synthesis process and optimize the performance of your circuit.
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Design for Reuse: The hierarchical nature of .ngc files allows you to create reusable design modules, which can be incorporated into other projects.
Conclusion
The .ngc file, a critical output of the synthesis stage in Xilinx ISE, represents the interconnection structure of your digital circuit. It serves as the bridge between your high-level design description and its physical implementation on an FPGA. Understanding .ngc files, their contents, and how they are generated is key to successful FPGA development using Xilinx ISE, enabling efficient design, debugging, and optimization. While the .ngc file is often viewed and manipulated within the Xilinx ISE environment, having a grasp of its purpose and contents empowers you to work more effectively with Xilinx ISE and achieve optimal results for your FPGA designs.